Publication
A N-PATH FRONT-END FOR A RF-CMOS DIGITAL RECEIVER
| Summary: | The evolution of digital communication standards, such as 5G, requires Radio Frequency Front-End (RFFE) of Radio Frequency Complementary Metal-Oxide-Semiconductor (RFCMOS) receivers to deal with complex modulations (e.g. Orthogonal Frequency Division Multiplexing (OFDM), 64-Quadrature Amplitude Modulation (QAM)) and a congested spectrum, which makes interference management crucial. As such, filters with a high quality factor are required. However, traditional solutions, which use multiple filters dedicated to different frequency bands, increase costs and complexity. N-path filters have emerged as an efficient alternative, offering high quality filters and reconfigurability to adjust the centre frequency and bandwidth, combining performance, flexibility and simplification. This thesis focuses on the implementation of key components of the RFFE receiver, such as the mixing, filtering, amplification and clock generation phases, with particular emphasis on the application of the N-Path filter. The design and layout of the components were developed in 65nm Bulk Complementary Metal-Oxide-Semiconductor (CMOS) technology, with a supply voltage of 1.2V, with the receiver being designed to operate in the GHz band. The simulations carried out on the receiver schematic demonstrated fulfilment of the main performance requirements, including selectivity and quality factor, validating the effectiveness of implementing the N-path filter in the receiver chain. To assess the N-path behaviour under technology parameter variations, Monte Carlo simulations were conducted, analyzing key performance metrics such as DC gain, center frequency, and gain at center frequency. The robustness of the circuit was evaluated through the average and standard deviation of these parameters. Additionally, the post-layout simulations, with RC extraction, were consistent with the results obtained in the schematic, with minor deviations. Finally, the energy consumption revealed that the RFFE of the RF-CMOS receiver consumed 1.58mW. |
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| Main Authors: | Azevedo, Ana Carolina Rei |
| Subject: | RF-CMOS Receivers RFFE N-Path filters |
| Year: | 2024 |
| Country: | Portugal |
| Document type: | master thesis |
| Access type: | open access |
| Associated institution: | Universidade Nova de Lisboa |
| Language: | English |
| Origin: | Repositório Institucional da UNL |
| Summary: | The evolution of digital communication standards, such as 5G, requires Radio Frequency Front-End (RFFE) of Radio Frequency Complementary Metal-Oxide-Semiconductor (RFCMOS) receivers to deal with complex modulations (e.g. Orthogonal Frequency Division Multiplexing (OFDM), 64-Quadrature Amplitude Modulation (QAM)) and a congested spectrum, which makes interference management crucial. As such, filters with a high quality factor are required. However, traditional solutions, which use multiple filters dedicated to different frequency bands, increase costs and complexity. N-path filters have emerged as an efficient alternative, offering high quality filters and reconfigurability to adjust the centre frequency and bandwidth, combining performance, flexibility and simplification. This thesis focuses on the implementation of key components of the RFFE receiver, such as the mixing, filtering, amplification and clock generation phases, with particular emphasis on the application of the N-Path filter. The design and layout of the components were developed in 65nm Bulk Complementary Metal-Oxide-Semiconductor (CMOS) technology, with a supply voltage of 1.2V, with the receiver being designed to operate in the GHz band. The simulations carried out on the receiver schematic demonstrated fulfilment of the main performance requirements, including selectivity and quality factor, validating the effectiveness of implementing the N-path filter in the receiver chain. To assess the N-path behaviour under technology parameter variations, Monte Carlo simulations were conducted, analyzing key performance metrics such as DC gain, center frequency, and gain at center frequency. The robustness of the circuit was evaluated through the average and standard deviation of these parameters. Additionally, the post-layout simulations, with RC extraction, were consistent with the results obtained in the schematic, with minor deviations. Finally, the energy consumption revealed that the RFFE of the RF-CMOS receiver consumed 1.58mW. |
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Funded activities
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