Publicação
SAMPA chip : the new 32 channels ASIC for the ALICE TPC and MCH upgrades
| Resumo: | Abstract: This paper presents the test results of the second prototype of SAMPA, the ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chamber (MCH). SAMPA is made in a 130 nm CMOS technology with 1.25V nominal voltage supply and provides 32 channels, with selectable input polarity, and three possible combinations of shaping time and sensitivity. Each channel consists of a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC; a Digital Signal Processor provides digital filtering and compression capability. In the second prototype run both full chip and single test blocks were fabricated, allowing block characterization and full system behaviour studies. Experimental results are here presented showing agreement with requirements for both the blocks and the full chip |
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| Autores principais: | Chinellato, David Dobrigkeit, 1983- |
| Outros Autores: | Ruette, Antônio Eduardo Gregorin, 1996- |
| Assunto: | Semicondutores complementares de óxido metálico Detectores Circuitos eletrônicos Metal oxide semiconductors, Complementary Detectors Electronic circuits Artigo de evento CMOS readout of gaseous detectors Front-end electronics for detector readout Analogue electronic circuits |
| Ano: | 2017 |
| País: | Brasil |
| Tipo de documento: | artigo |
| Tipo de acesso: | acesso aberto |
| Instituição associada: | IBICT |
| Idioma: | inglês |
| Origem: | Oasisbr |
| Resumo: | Abstract: This paper presents the test results of the second prototype of SAMPA, the ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chamber (MCH). SAMPA is made in a 130 nm CMOS technology with 1.25V nominal voltage supply and provides 32 channels, with selectable input polarity, and three possible combinations of shaping time and sensitivity. Each channel consists of a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC; a Digital Signal Processor provides digital filtering and compression capability. In the second prototype run both full chip and single test blocks were fabricated, allowing block characterization and full system behaviour studies. Experimental results are here presented showing agreement with requirements for both the blocks and the full chip |
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