Publicação

Amorphous silicon photovoltaic modules on flexible plastic substrates

Detalhes bibliográficos
Resumo:	This paper reports on a monolithic 10 cm x 10 cm area PV module integrating an array of 72 a-Si:H n-i-p cells on a 100 mu m thick polyethylene-naphtalate substrate. The n-i-p stack is deposited using a PECVD system at 150 degrees C substrate temperature. The design optimization and device performance analysis are performed using a two-dimensional distributed circuit model of the photovoltaic cell. The circuit simulator SPICE is used to calculate current and potential distributions in a network of sub-cell circuits, and also to map Joule losses in the front TCO electrode and the metal grid. Experimental results show that the shunt leakage is one of the factors reducing the device performance. Current-voltage characteristics of individual a-Si: H p-i-n cells were analyzed to estimate a variation of shunt resistances. Using the LBIC technique, the presence of multiple shunts in the n-i-p cell was detected. To understand the nature of electrical shunts, the change in the surface roughness of all device layers was analyzed throughout fabrication process. It is found that surface defects in plastic foils, which are thermally induced during the device fabrication, form microscopic pinholes filled with highly conductive top electrode material.
Autores principais:	Vygranenko, Yuri
Outros Autores:	Fernandes, Miguel; Louro, Paula; Vieira, Manuela; Khosropour, Alireza; Yang, Ruifeng; Sazonov, Andrei
Assunto:	Photovoltaic Plasma-enhanced CVD (PECVD) (deposition) Thin film Fotovoltaica
Ano:	2016
País:	Portugal
Tipo de documento:	artigo
Tipo de acesso:	acesso restrito
Instituição associada:	Universidade Politécnica de Lisboa
Idioma:	inglês
Origem:	Repositório Científico da Universidade Politécnica de Lisboa

Descrição
Resumo:	This paper reports on a monolithic 10 cm x 10 cm area PV module integrating an array of 72 a-Si:H n-i-p cells on a 100 mu m thick polyethylene-naphtalate substrate. The n-i-p stack is deposited using a PECVD system at 150 degrees C substrate temperature. The design optimization and device performance analysis are performed using a two-dimensional distributed circuit model of the photovoltaic cell. The circuit simulator SPICE is used to calculate current and potential distributions in a network of sub-cell circuits, and also to map Joule losses in the front TCO electrode and the metal grid. Experimental results show that the shunt leakage is one of the factors reducing the device performance. Current-voltage characteristics of individual a-Si: H p-i-n cells were analyzed to estimate a variation of shunt resistances. Using the LBIC technique, the presence of multiple shunts in the n-i-p cell was detected. To understand the nature of electrical shunts, the change in the surface roughness of all device layers was analyzed throughout fabrication process. It is found that surface defects in plastic foils, which are thermally induced during the device fabrication, form microscopic pinholes filled with highly conductive top electrode material.

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